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GoldMine: Automatic assertion generation using data mining and static analysis


Year
2010
Authors
Shobha Vasudevan, David Sheridan, Sanjay Patel, David Tcheng, Bill Tuohy, Daniel Johnson
DOI
10.1109/DATE.2010.5457129

Related

[[roginAutomaticGenerationComplex]], [[wangAutomaticGenerationAssertions1998]]

Persistent Notes

In-text annotations

“I. INTRODUCTION AND MOTIVATION” Page 1

“The key question then is: How are these assertions generated? Assertion generation is an entirely manual effort in the hardware system design cycle. The trade-off point for crafting minimal, but effective (high coverage) assertions takes multiple iterations and man-months to achieve [2]. Another challenge with assertion generation is due to the modular nature of system development. Maintaining consistency of inter-modular global assertions as the system evolves in this fragmented framework is very tedious. In sequential hardware, temporal properties that cut across time cycles are usually the source of subtle, but serious bugs. Temporal assertion generation is very difficult for the human mind to reason with." Page 1

This is goldmine’s motivation for assertion mining Page 1

“n hardware, there have been no prior attempts to generate assertions through data mining and static analysis of RTL source code." Page 1

“II. GOLDMINE: ASSERTION GENERATION METHODOLOGY” Page 2

“III. CASE STUDY: RIGEL RTL” Page 3

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