../
Difference between BPS and HARM
Frontend
In HARM Not in BPS
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_prediction[0].taken |-> ##1 i_ras.data_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_prediction[0].taken |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.taken |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.taken |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.taken |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.taken |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.valid |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) bp_valid |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) bp_valid |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) bp_valid |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) bp_valid |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_prediction_shifted[0].valid |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_prediction_shifted[0].valid |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_prediction_shifted[0].valid |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_prediction_shifted[0].valid |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_prediction[0].valid |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_prediction[0].valid |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_prediction[0].valid |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_prediction[0].valid |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_update.valid |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) debug_mode_i |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) eret_i |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) ex_valid_i |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) fetch_entry_ready_i |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) fetch_entry_ready_i |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) fetch_entry_ready_i |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) fetch_entry_ready_i |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.is_jal_r |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.is_jal_r |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.is_jal_r |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.is_jal_r |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.is_rvc |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.is_rvc |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.is_rvc |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.is_rvc |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_branch_o |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_call_o |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jalr_o |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jr_o |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jr_o |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jr_o |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jr_o |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jump_o |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jump_o |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jump_o |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jump_o |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_return_o |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_branch_o |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_branch_o |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_branch_o |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_branch_o |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jalr_o |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jump_o |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jump_o |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jump_o |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jump_o |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.is_jal_r |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_branch_o |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_call_o |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jalr_o |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jr_o |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jump_o |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_return_o |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_prediction_o[0].taken |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.taken |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.taken |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.taken |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.taken |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.valid |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.debug_mode_i |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.btb_prediction_o[0].valid |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.btb_prediction_o[0].valid |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.btb_prediction_o[0].valid |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.btb_prediction_o[0].valid |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.btb_update_i.valid |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.debug_mode_i |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.branch_empty |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.branch_empty |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.branch_empty |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.branch_empty |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.consumed_o[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.consumed_o[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.consumed_o[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.consumed_o[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.consumed_o[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.consumed_o[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.consumed_o[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.consumed_o[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.fetch_entry_ready_i |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.fetch_entry_ready_i |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.fetch_entry_ready_i |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.fetch_entry_ready_i |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.fetch_entry_valid_o |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.fetch_entry_valid_o |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.fetch_entry_valid_o |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.fetch_entry_valid_o |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.fifo_pos[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.fifo_pos[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.fifo_pos[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.fifo_pos[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.fifo_pos[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.fifo_pos[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.fifo_pos[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.fifo_pos[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.flush_i |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.flush_i |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.pop_i |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.pop_i |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.pop_i |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.pop_i |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.push_i |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.push_i |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.push_i |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.push_i |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.read_pointer_n[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.read_pointer_n[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.read_pointer_n[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.read_pointer_n[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.read_pointer_n[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.read_pointer_n[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.read_pointer_n[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.read_pointer_n[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.read_pointer_q[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.read_pointer_q[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.read_pointer_q[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.read_pointer_q[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.read_pointer_q[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.read_pointer_q[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.read_pointer_q[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.read_pointer_q[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.usage_o[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.usage_o[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.usage_o[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.usage_o[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_n[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_n[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_n[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_n[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_n[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_n[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_n[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_n[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_q[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_q[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_q[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_q[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_q[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_q[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_q[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_q[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.flush_i |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.pop_i |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.pop_i |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.pop_i |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.pop_i |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.push_i |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.push_i |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.push_i |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.push_i |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.read_pointer_n[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.read_pointer_n[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.read_pointer_n[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.read_pointer_n[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.read_pointer_n[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.read_pointer_n[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.read_pointer_n[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.read_pointer_n[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.read_pointer_q[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.read_pointer_q[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.read_pointer_q[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.read_pointer_q[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.read_pointer_q[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.read_pointer_q[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.read_pointer_q[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.read_pointer_q[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.usage_o[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.usage_o[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.usage_o[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.usage_o[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.write_pointer_n[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.write_pointer_n[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.write_pointer_n[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.write_pointer_n[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.write_pointer_n[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.write_pointer_n[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.write_pointer_n[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.write_pointer_n[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.write_pointer_q[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.write_pointer_q[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.write_pointer_q[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.write_pointer_q[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.write_pointer_q[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.write_pointer_q[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.write_pointer_q[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.write_pointer_q[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.left_child_result[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.left_child_result[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.left_child_result[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.left_child_result[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.left_child_result[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.padded_input[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.padded_input[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.padded_input[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.padded_input[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.padded_input[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.padded_input[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.padded_input[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.padded_input[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.popcount_o[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.popcount_o[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.popcount_o[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.popcount_o[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.popcount_o[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.popcount_o[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.popcount_o[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.popcount_o[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.right_child_result[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.right_child_result[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.right_child_result[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.right_child_result[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.right_child_result[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.idx_ds_d[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.idx_ds_d[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.idx_ds_d[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.idx_ds_d[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.idx_ds_d[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.idx_ds_d[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.idx_ds_d[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.idx_ds_d[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.idx_ds_q[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.idx_ds_q[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.idx_ds_q[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.idx_ds_q[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.idx_ds_q[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.idx_ds_q[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.idx_ds_q[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.idx_ds_q[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.idx_is_d[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.idx_is_d[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.idx_is_d[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.idx_is_d[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.idx_is_q[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.idx_is_q[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.idx_is_q[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.idx_is_q[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_overflow_fifo[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_overflow_fifo[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_overflow |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_queue_usage[0][0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_queue_usage[0][0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_queue_usage[0][0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_queue_usage[0][0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_queue_usage[1][0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_queue_usage[1][0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_queue_usage[1][0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_queue_usage[1][0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.pop_instr[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.pop_instr[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.pop_instr[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.pop_instr[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.pop_instr[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.pop_instr[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.pop_instr[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.pop_instr[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.popcount[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.popcount[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.popcount[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.popcount[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.popcount[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.popcount[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.popcount[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.popcount[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.push_instr_fifo[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.push_instr_fifo[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.push_instr_fifo[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.push_instr_fifo[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.push_instr_fifo[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.push_instr_fifo[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.push_instr_fifo[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.push_instr_fifo[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.push_instr[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.push_instr[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.push_instr[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.push_instr[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.push_instr[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.push_instr[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.push_instr[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.push_instr[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.replay_o |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.shamt[0] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.shamt[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.shamt[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.shamt[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.shamt[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.shamt[0] |-> ##1 i_instr_queue.fetch_entry_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.shamt[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.shamt[0] |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.shamt[0] |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.shamt[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.taken[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.taken[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.taken[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.taken[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.taken[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.valid_i[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.valid_i[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.valid_i[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.valid_i[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.valid_i[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.valid_i[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.valid_i[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.valid_i[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.valid[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.valid[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.valid[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.valid[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.valid[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.valid[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.valid[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.valid[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_realign.flush_i |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_realign.flush_i |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_realign.flush_i |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_realign.flush_i |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_realign.valid_i |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_realign.valid_i |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_realign.valid_i |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_realign.valid_i |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_realign.valid_o[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_realign.valid_o[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_realign.valid_o[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_realign.valid_o[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_realign.valid_o[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_realign.valid_o[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_realign.valid_o[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_realign.valid_o[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_ras.pop_i |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_ras.push_i |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_i.ready |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_i.ready |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_i.ready |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_i.ready |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_i.valid |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_i.valid |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_i.valid |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_i.valid |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_valid_q |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_valid_q |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_valid_q |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_valid_q |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) if_ready |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) if_ready |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) if_ready |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) if_ready |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) instr_queue_consumed[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) instr_queue_consumed[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) instr_queue_consumed[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) instr_queue_consumed[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) instr_queue_consumed[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) instr_queue_consumed[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) instr_queue_consumed[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) instr_queue_consumed[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[1] |-> ##1 i_instr_queue.idx_is_d[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_call[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_call[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.idx_is_d[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.idx_is_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jump[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jump[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jump[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jump[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jump[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_mispredict |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_return[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_return[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) npc_rst_load_q |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) ras_pop |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) ras_push |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) replay |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_branch[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_branch[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jr[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jr[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jr[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jr[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jr[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jump[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jump[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jump[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jump[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jump[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_return[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_return[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_branch[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_branch[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_branch[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_branch[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jalr[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jump[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jump[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jump[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jump[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[0] |-> ##1 i_instr_queue.idx_is_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[0] |-> ##1 i_instr_queue.idx_is_d[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvi_cf[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvi_cf[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvi_cf[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvi_cf[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_prediction_shifted[0].taken |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_prediction_shifted[0].valid |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_prediction_shifted[1].taken |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_prediction_shifted[1].valid |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_prediction[0].valid |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_prediction[1].taken |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_prediction[1].valid |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_q.valid |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_call_o |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_prediction_o[0].valid |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_prediction_o[1].taken |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_prediction_o[1].valid |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.saturation_counter[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.saturation_counter[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.usage_o[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.usage_o[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_queue_full[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_queue_full[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_queue_usage[0][1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_queue_usage[1][1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_realign.serving_unaligned_o |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_realign.unaligned_d |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_realign.unaligned_q |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_call[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) serving_unaligned |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) shamt[0] |-> ##1 gen_instr_scan[1].i_instr_scan.is_rvc);
In BPS Not in HARM
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.valid |-> ##1 i_bht.debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.valid |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.valid |-> ##1 i_btb.debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) bp_valid |-> ##1 fetch_entry_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) debug_mode_i |-> ##1 i_bht.debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) debug_mode_i |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) debug_mode_i |-> ##1 i_btb.debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) fetch_entry_valid_o |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_branch_o |-> ##1 i_bht.debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_branch_o |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_branch_o |-> ##1 i_btb.debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jalr_o |-> ##1 icache_dreq_i.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jalr_o |-> ##1 icache_dreq_i.ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jump_o |-> ##1 i_bht.debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jump_o |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jump_o |-> ##1 i_btb.debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.valid |-> ##1 i_bht.debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.valid |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.valid |-> ##1 i_btb.debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.debug_mode_i |-> ##1 i_bht.debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.debug_mode_i |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.debug_mode_i |-> ##1 i_btb.debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.debug_mode_i |-> ##1 i_bht.debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.debug_mode_i |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.debug_mode_i |-> ##1 i_btb.debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.left_child_result |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.popcount_o[0] |-> ##1 fetch_entry_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.right_child_result |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_overflow |-> ##1 icache_dreq_i.ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_overflow_fifo[0] |-> ##1 icache_dreq_i.ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_overflow_fifo[1] |-> ##1 icache_dreq_i.ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.popcount[0] |-> ##1 fetch_entry_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.replay_o |-> ##1 icache_dreq_i.ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.shamt |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.shamt |-> ##1 fetch_entry_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.shamt |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.shamt |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.shamt |-> ##1 i_instr_queue.fetch_entry_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.shamt |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.shamt |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.taken[0] |-> ##1 fetch_entry_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_ras.stack_q[1].valid |-> ##1 i_ras.stack_d[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_ras.stack_q[1].valid |-> ##1 ras_predict.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_ras.stack_q[1].valid |-> ##1 i_ras.stack_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_ras.stack_q[1].valid |-> ##1 i_ras.data_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_i.valid |-> ##1 icache_dreq_i.ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_o.kill_s1 |-> ##1 i_instr_queue.idx_ds_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_o.kill_s1 |-> ##1 i_instr_queue.instr_queue_empty[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_o.kill_s1 |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_o.kill_s1 |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_o.kill_s1 |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_o.kill_s1 |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_o.kill_s1 |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_o.kill_s1 |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_o.kill_s1 |-> ##1 i_instr_queue.idx_ds_d[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_o.kill_s2 |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_o.kill_s2 |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_o.kill_s2 |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[0] |-> ##1 fetch_entry_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[0] |-> ##1 i_bht.debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[0] |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[0] |-> ##1 i_btb.debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[1] |-> ##1 i_instr_queue.idx_is_d);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.idx_is_d);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.idx_is_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 fetch_entry_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jump[0] |-> ##1 fetch_entry_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) replay |-> ##1 icache_dreq_i.ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_branch[0] |-> ##1 i_bht.debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_branch[0] |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_branch[0] |-> ##1 i_btb.debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jalr[0] |-> ##1 icache_dreq_i.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jalr[0] |-> ##1 icache_dreq_i.ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jump[0] |-> ##1 i_bht.debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jump[0] |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jump[0] |-> ##1 i_btb.debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[0] |-> ##1 i_instr_queue.idx_is_d);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[0] |-> ##1 i_instr_queue.idx_is_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[0] |-> ##1 fetch_entry_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvi_cf[0] |-> ##1 fetch_entry_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvi_cf[0] |-> ##1 i_bht.debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvi_cf[0] |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvi_cf[0] |-> ##1 i_btb.debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_queue_empty[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_queue_empty[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_queue_empty[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_queue_empty[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_queue_empty[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_queue_empty[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_ras.stack_d[0].valid |-> ##1 i_ras.data_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_ras.stack_d[0].valid |-> ##1 ras_predict.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_ras.stack_d[0].valid |-> ##1 i_ras.stack_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_ras.stack_d[1].valid |-> ##1 i_ras.stack_d[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_ras.stack_d[1].valid |-> ##1 i_ras.data_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_ras.stack_d[1].valid |-> ##1 i_ras.stack_q[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_ras.stack_d[1].valid |-> ##1 ras_predict.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_ras.stack_d[1].valid |-> ##1 i_ras.stack_q[0].valid);
In Both
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_prediction[0].taken |-> ##1 ras_predict.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_prediction[0].taken |-> ##1 i_ras.stack_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_prediction[0].taken |-> ##1 i_ras.stack_d[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.taken |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.taken |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.taken |-> ##1 i_instr_queue.instr_queue_empty[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.taken |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.taken |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.taken |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.taken |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.valid |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.valid |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.valid |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.valid |-> ##1 i_instr_queue.instr_queue_empty[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.valid |-> ##1 gen_instr_scan[0].i_instr_scan.rvi_branch_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.valid |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.valid |-> ##1 rvi_branch[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.valid |-> ##1 i_instr_queue.idx_ds_d[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.valid |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.valid |-> ##1 i_instr_queue.idx_ds_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.valid |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.valid |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.valid |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) bht_update.valid |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) bp_valid |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) bp_valid |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) bp_valid |-> ##1 i_instr_queue.fetch_entry_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) bp_valid |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) bp_valid |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) bp_valid |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_prediction_shifted[0].valid |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_prediction[0].valid |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_update.valid |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_update.valid |-> ##1 rvc_jr[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_update.valid |-> ##1 i_instr_queue.instr_queue_empty[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_update.valid |-> ##1 btb_prediction_shifted[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_update.valid |-> ##1 gen_instr_scan[0].i_instr_scan.is_jal_r);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_update.valid |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_update.valid |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_update.valid |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_update.valid |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_update.valid |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_update.valid |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_update.valid |-> ##1 i_btb.btb_prediction_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_update.valid |-> ##1 gen_instr_scan[0].i_instr_scan.rvc_jr_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_update.valid |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_update.valid |-> ##1 btb_prediction[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_update.valid |-> ##1 gen_instr_scan[0].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_update.valid |-> ##1 i_instr_queue.idx_ds_d[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_update.valid |-> ##1 i_instr_queue.idx_ds_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) btb_update.valid |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) debug_mode_i |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) debug_mode_i |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) debug_mode_i |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) eret_i |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) eret_i |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) eret_i |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) eret_i |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) eret_i |-> ##1 i_instr_queue.instr_queue_empty[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) eret_i |-> ##1 i_instr_queue.idx_ds_d[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) eret_i |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) eret_i |-> ##1 i_instr_queue.idx_ds_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) eret_i |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) eret_i |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) eret_i |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) eret_i |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) ex_valid_i |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) ex_valid_i |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) ex_valid_i |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) ex_valid_i |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) ex_valid_i |-> ##1 i_instr_queue.instr_queue_empty[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) ex_valid_i |-> ##1 i_instr_queue.idx_ds_d[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) ex_valid_i |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) ex_valid_i |-> ##1 i_instr_queue.idx_ds_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) ex_valid_i |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) ex_valid_i |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) ex_valid_i |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) ex_valid_i |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) fetch_entry_ready_i |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 i_instr_queue.instr_queue_empty[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 i_instr_queue.idx_ds_d[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 i_instr_queue.idx_ds_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.is_jal_r |-> ##1 gen_instr_scan[0].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.is_jal_r |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_branch_o |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_branch_o |-> ##1 i_ras.stack_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_branch_o |-> ##1 i_ras.data_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_branch_o |-> ##1 i_ras.stack_d[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_branch_o |-> ##1 ras_predict.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_call_o |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_call_o |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_call_o |-> ##1 i_instr_realign.unaligned_d);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_call_o |-> ##1 i_ras.stack_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_call_o |-> ##1 i_ras.stack_d[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_call_o |-> ##1 i_instr_queue.instr_queue_empty[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_call_o |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_call_o |-> ##1 i_ras.data_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_call_o |-> ##1 gen_instr_scan[0].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_call_o |-> ##1 i_ras.stack_d[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_call_o |-> ##1 i_instr_queue.idx_ds_d[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_call_o |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_call_o |-> ##1 i_instr_queue.idx_ds_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_call_o |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_call_o |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_call_o |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_call_o |-> ##1 i_ras.stack_q[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_call_o |-> ##1 ras_predict.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jalr_o |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jalr_o |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jalr_o |-> ##1 i_instr_realign.unaligned_d);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jalr_o |-> ##1 i_ras.stack_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jalr_o |-> ##1 i_ras.stack_d[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jalr_o |-> ##1 i_instr_queue.instr_queue_empty[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jalr_o |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jalr_o |-> ##1 i_ras.data_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jalr_o |-> ##1 gen_instr_scan[0].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jalr_o |-> ##1 i_ras.stack_d[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jalr_o |-> ##1 i_instr_queue.idx_ds_d[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jalr_o |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jalr_o |-> ##1 i_instr_queue.idx_ds_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jalr_o |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jalr_o |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jalr_o |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jalr_o |-> ##1 i_ras.stack_q[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jalr_o |-> ##1 ras_predict.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jr_o |-> ##1 gen_instr_scan[0].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jr_o |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jump_o |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_jump_o |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_return_o |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_return_o |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvc_return_o |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jalr_o |-> ##1 btb_prediction_shifted[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jalr_o |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jalr_o |-> ##1 i_instr_queue.instr_queue_empty[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jalr_o |-> ##1 icache_valid_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jalr_o |-> ##1 i_instr_realign.valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jalr_o |-> ##1 i_btb.btb_prediction_o[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jalr_o |-> ##1 if_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jalr_o |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jalr_o |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jalr_o |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jalr_o |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jalr_o |-> ##1 i_instr_realign.unaligned_d);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jalr_o |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jalr_o |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jalr_o |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jalr_o |-> ##1 btb_prediction[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jalr_o |-> ##1 i_instr_queue.idx_ds_d[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jalr_o |-> ##1 i_instr_queue.idx_ds_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[0].i_instr_scan.rvi_jalr_o |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.is_jal_r |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_branch_o |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.write_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_branch_o |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_branch_o |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_branch_o |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_n[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_branch_o |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_branch_o |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_branch_o |-> ##1 i_ras.stack_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_branch_o |-> ##1 i_ras.stack_d[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_branch_o |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_branch_o |-> ##1 i_ras.data_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_branch_o |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_branch_o |-> ##1 i_ras.stack_d[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_branch_o |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_branch_o |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_n[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_branch_o |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.write_pointer_n[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_branch_o |-> ##1 i_ras.stack_q[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_branch_o |-> ##1 ras_predict.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_call_o |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_call_o |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_call_o |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.usage_o[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_call_o |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_call_o |-> ##1 i_ras.stack_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_call_o |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_call_o |-> ##1 i_instr_queue.instr_queue_usage[1][1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_call_o |-> ##1 i_ras.data_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_call_o |-> ##1 i_instr_queue.instr_queue_usage[0][1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_call_o |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_call_o |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_call_o |-> ##1 i_ras.stack_d[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_call_o |-> ##1 ras_predict.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_call_o |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.usage_o[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jalr_o |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jalr_o |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jalr_o |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.usage_o[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jalr_o |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jalr_o |-> ##1 i_ras.stack_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jalr_o |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jalr_o |-> ##1 i_instr_queue.instr_queue_usage[1][1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jalr_o |-> ##1 i_ras.data_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jalr_o |-> ##1 i_instr_queue.instr_queue_usage[0][1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jalr_o |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jalr_o |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jalr_o |-> ##1 i_ras.stack_d[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jalr_o |-> ##1 ras_predict.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jalr_o |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.usage_o[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jr_o |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jump_o |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jump_o |-> ##1 i_ras.stack_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jump_o |-> ##1 i_ras.stack_d[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jump_o |-> ##1 i_ras.data_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jump_o |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jump_o |-> ##1 i_ras.stack_d[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jump_o |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_n[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jump_o |-> ##1 i_ras.stack_q[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_jump_o |-> ##1 ras_predict.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) gen_instr_scan[1].i_instr_scan.rvc_return_o |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_prediction_o[0].taken |-> ##1 i_ras.data_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_prediction_o[0].taken |-> ##1 ras_predict.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_prediction_o[0].taken |-> ##1 i_ras.stack_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_prediction_o[0].taken |-> ##1 i_ras.stack_d[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.taken |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.taken |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.taken |-> ##1 i_instr_queue.instr_queue_empty[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.taken |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.taken |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.taken |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.taken |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.valid |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.valid |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.valid |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.valid |-> ##1 i_instr_queue.instr_queue_empty[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.valid |-> ##1 gen_instr_scan[0].i_instr_scan.rvi_branch_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.valid |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.valid |-> ##1 rvi_branch[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.valid |-> ##1 i_instr_queue.idx_ds_d[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.valid |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.valid |-> ##1 i_instr_queue.idx_ds_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.valid |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.valid |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.valid |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.bht_update_i.valid |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.debug_mode_i |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.debug_mode_i |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_bht.debug_mode_i |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.btb_prediction_o[0].valid |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.btb_update_i.valid |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.btb_update_i.valid |-> ##1 rvc_jr[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.btb_update_i.valid |-> ##1 i_instr_queue.instr_queue_empty[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.btb_update_i.valid |-> ##1 btb_prediction_shifted[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.btb_update_i.valid |-> ##1 gen_instr_scan[0].i_instr_scan.is_jal_r);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.btb_update_i.valid |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.btb_update_i.valid |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.btb_update_i.valid |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.btb_update_i.valid |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.btb_update_i.valid |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.btb_update_i.valid |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.btb_update_i.valid |-> ##1 i_btb.btb_prediction_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.btb_update_i.valid |-> ##1 gen_instr_scan[0].i_instr_scan.rvc_jr_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.btb_update_i.valid |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.btb_update_i.valid |-> ##1 btb_prediction[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.btb_update_i.valid |-> ##1 gen_instr_scan[0].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.btb_update_i.valid |-> ##1 i_instr_queue.idx_ds_d[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.btb_update_i.valid |-> ##1 i_instr_queue.idx_ds_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.btb_update_i.valid |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.debug_mode_i |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.debug_mode_i |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_btb.debug_mode_i |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.consumed_o[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.consumed_o[1] |-> ##1 gen_instr_scan[0].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.consumed_o[1] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.fetch_entry_ready_i |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.fetch_entry_valid_o |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.fifo_pos[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.fifo_pos[1] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.flush_i |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.flush_i |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.flush_i |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.flush_i |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.flush_i |-> ##1 i_instr_queue.instr_queue_empty[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.flush_i |-> ##1 i_instr_queue.idx_ds_d[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.flush_i |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.flush_i |-> ##1 i_instr_queue.idx_ds_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.flush_i |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.flush_i |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.flush_i |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.flush_i |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.flush_i |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.flush_i |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.flush_i |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.flush_i |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.flush_i |-> ##1 i_instr_queue.instr_queue_empty[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.flush_i |-> ##1 i_instr_queue.idx_ds_d[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.flush_i |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.flush_i |-> ##1 i_instr_queue.idx_ds_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.flush_i |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.flush_i |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.flush_i |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.flush_i |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.pop_i |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.pop_i |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.pop_i |-> ##1 i_instr_queue.instr_queue_empty[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.push_i |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.usage_o[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.flush_i |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.flush_i |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.flush_i |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.flush_i |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.flush_i |-> ##1 i_instr_queue.instr_queue_empty[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.flush_i |-> ##1 i_instr_queue.idx_ds_d[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.flush_i |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.flush_i |-> ##1 i_instr_queue.idx_ds_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.flush_i |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.flush_i |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.flush_i |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.flush_i |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.pop_i |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.pop_i |-> ##1 i_instr_queue.idx_ds_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.push_i |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.usage_o[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.padded_input[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.padded_input[1] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.popcount_o[0] |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.popcount_o[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.popcount_o[0] |-> ##1 i_instr_queue.fetch_entry_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.popcount_o[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.popcount_o[0] |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.popcount_o[0] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.popcount_o[1] |-> ##1 gen_instr_scan[0].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.i_popcount.popcount_o[1] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.idx_ds_d[0] |-> ##1 i_instr_queue.idx_ds_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_overflow_fifo[0] |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_overflow_fifo[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_overflow_fifo[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_overflow_fifo[0] |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_overflow_fifo[0] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_overflow_fifo[1] |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_overflow_fifo[1] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_overflow_fifo[1] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_overflow_fifo[1] |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_overflow_fifo[1] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_overflow |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_overflow |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_overflow |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_overflow |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_overflow |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_queue_usage[0][0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.instr_queue_usage[1][0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.pop_instr[0] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.pop_instr[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.pop_instr[0] |-> ##1 i_instr_queue.instr_queue_empty[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.pop_instr[1] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.pop_instr[1] |-> ##1 i_instr_queue.idx_ds_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.popcount[0] |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.popcount[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.popcount[0] |-> ##1 i_instr_queue.fetch_entry_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.popcount[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.popcount[0] |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.popcount[0] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.popcount[1] |-> ##1 gen_instr_scan[0].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.popcount[1] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.push_instr_fifo[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.push_instr_fifo[1] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.push_instr[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.push_instr[1] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.replay_o |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.replay_o |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.replay_o |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.replay_o |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.replay_o |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.taken[0] |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.taken[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.taken[0] |-> ##1 i_instr_queue.fetch_entry_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.taken[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.taken[0] |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.taken[0] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.taken[1] |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.taken[1] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.taken[1] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.taken[1] |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.taken[1] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.valid_i[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.valid_i[1] |-> ##1 gen_instr_scan[0].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.valid_i[1] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.valid[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.valid[1] |-> ##1 gen_instr_scan[0].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_queue.valid[1] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_realign.flush_i |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_realign.flush_i |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_realign.flush_i |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_realign.valid_i |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_realign.valid_o[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_realign.valid_o[1] |-> ##1 gen_instr_scan[0].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_instr_realign.valid_o[1] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_ras.pop_i |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_ras.pop_i |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_ras.pop_i |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_ras.pop_i |-> ##1 gen_instr_scan[0].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_ras.pop_i |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_ras.pop_i |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_ras.push_i |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_ras.push_i |-> ##1 i_ras.stack_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_ras.push_i |-> ##1 i_ras.data_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_ras.push_i |-> ##1 i_ras.stack_d[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_ras.push_i |-> ##1 ras_predict.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_i.ready |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_i.valid |-> ##1 if_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_i.valid |-> ##1 instr_queue_consumed[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_i.valid |-> ##1 i_instr_queue.valid_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_i.valid |-> ##1 i_instr_realign.valid_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_i.valid |-> ##1 icache_valid_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_i.valid |-> ##1 i_instr_queue.valid[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_i.valid |-> ##1 i_instr_queue.consumed_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_dreq_i.valid |-> ##1 i_instr_realign.valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_valid_q |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) if_ready |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) instr_queue_consumed[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) instr_queue_consumed[1] |-> ##1 gen_instr_scan[0].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) instr_queue_consumed[1] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[0] |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[0] |-> ##1 i_instr_queue.fetch_entry_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[0] |-> ##1 gen_instr_scan[0].i_instr_scan.rvi_branch_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[0] |-> ##1 rvi_branch[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.read_pointer_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[0] |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[0] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[1] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_n[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[1] |-> ##1 i_ras.stack_d[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[1] |-> ##1 i_ras.stack_q[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[1] |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[1] |-> ##1 i_ras.data_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[1] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.usage_o[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[1] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.write_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[1] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[1] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[1] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[1] |-> ##1 i_ras.stack_d[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[1] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_n[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[1] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.write_pointer_n[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[1] |-> ##1 i_ras.stack_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[1] |-> ##1 i_instr_queue.idx_ds_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[1] |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[1] |-> ##1 i_instr_queue.instr_queue_usage[0][1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_branch[1] |-> ##1 ras_predict.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_call[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_call[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_call[0] |-> ##1 i_ras.stack_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_call[0] |-> ##1 i_ras.data_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_call[0] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_call[0] |-> ##1 i_ras.stack_d[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_call[0] |-> ##1 ras_predict.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_call[1] |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_call[1] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_call[1] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.usage_o[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_call[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_call[1] |-> ##1 i_ras.stack_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_call[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_call[1] |-> ##1 i_instr_queue.instr_queue_usage[1][1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_call[1] |-> ##1 i_ras.data_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_call[1] |-> ##1 i_instr_queue.instr_queue_usage[0][1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_call[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_call[1] |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_call[1] |-> ##1 i_ras.stack_d[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_call[1] |-> ##1 ras_predict.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_call[1] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.usage_o[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 rvc_jr[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.read_pointer_n[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.instr_queue_usage[0][0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.write_pointer_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 gen_instr_scan[0].i_instr_scan.is_jal_r);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.pop_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.pop_instr[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.read_pointer_n[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.idx_ds_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.write_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.usage_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.usage_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.read_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.write_pointer_n[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.read_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.read_pointer_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.instr_queue_usage[1][0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.read_pointer_n[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.fetch_entry_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 gen_instr_scan[0].i_instr_scan.rvc_jr_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 gen_instr_scan[0].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.idx_ds_d[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.write_pointer_n[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jalr[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.read_pointer_n[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jump[0] |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jump[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jump[0] |-> ##1 i_instr_queue.fetch_entry_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jump[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jump[0] |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jump[0] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jump[1] |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jump[1] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jump[1] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jump[1] |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jump[1] |-> ##1 i_ras.stack_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jump[1] |-> ##1 i_ras.stack_d[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jump[1] |-> ##1 i_ras.data_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jump[1] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jump[1] |-> ##1 i_ras.stack_d[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jump[1] |-> ##1 i_instr_queue.idx_ds_d[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jump[1] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_n[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jump[1] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jump[1] |-> ##1 i_ras.stack_q[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_jump[1] |-> ##1 ras_predict.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_mispredict |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_mispredict |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_mispredict |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_mispredict |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_mispredict |-> ##1 i_instr_queue.instr_queue_empty[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_mispredict |-> ##1 i_instr_queue.idx_ds_d[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_mispredict |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_mispredict |-> ##1 i_instr_queue.idx_ds_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_mispredict |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_mispredict |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_mispredict |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_mispredict |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_return[0] |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_return[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_return[0] |-> ##1 gen_instr_scan[0].i_instr_scan.is_jal_r);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_return[0] |-> ##1 gen_instr_scan[0].i_instr_scan.rvc_return_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_return[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_return[0] |-> ##1 rvc_jr[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_return[0] |-> ##1 gen_instr_scan[0].i_instr_scan.rvc_jr_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_return[0] |-> ##1 gen_instr_scan[0].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_return[0] |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_return[0] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_return[0] |-> ##1 rvc_return[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_return[1] |-> ##1 rvc_return[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_return[1] |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_return[1] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_return[1] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_return[1] |-> ##1 rvc_jr[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_return[1] |-> ##1 gen_instr_scan[0].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_return[1] |-> ##1 gen_instr_scan[1].i_instr_scan.is_jal_r);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_return[1] |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_return[1] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_return[1] |-> ##1 gen_instr_scan[1].i_instr_scan.rvc_jr_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_return[1] |-> ##1 gen_instr_scan[1].i_instr_scan.rvc_return_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) npc_rst_load_q |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) npc_rst_load_q |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) npc_rst_load_q |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) npc_rst_load_q |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) npc_rst_load_q |-> ##1 i_instr_queue.instr_queue_empty[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) npc_rst_load_q |-> ##1 gen_instr_scan[0].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) npc_rst_load_q |-> ##1 i_instr_queue.idx_ds_d[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) npc_rst_load_q |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) npc_rst_load_q |-> ##1 i_instr_queue.idx_ds_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) npc_rst_load_q |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) npc_rst_load_q |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) npc_rst_load_q |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) npc_rst_load_q |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) ras_pop |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) ras_pop |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) ras_pop |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) ras_pop |-> ##1 gen_instr_scan[0].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) ras_pop |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) ras_pop |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) ras_push |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) ras_push |-> ##1 i_ras.stack_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) ras_push |-> ##1 i_ras.data_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) ras_push |-> ##1 i_ras.stack_d[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) ras_push |-> ##1 ras_predict.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) replay |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) replay |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) replay |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) replay |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) replay |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 i_instr_queue.instr_queue_empty[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 i_instr_queue.idx_ds_d[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 i_instr_queue.idx_ds_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 i_instr_queue.instr_queue_empty[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 i_instr_queue.instr_queue_empty[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_branch[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_branch[0] |-> ##1 i_ras.stack_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_branch[0] |-> ##1 i_ras.data_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_branch[0] |-> ##1 i_ras.stack_d[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_branch[0] |-> ##1 ras_predict.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_branch[1] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.write_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_branch[1] |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_branch[1] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_branch[1] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_n[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_branch[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_branch[1] |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_branch[1] |-> ##1 i_ras.stack_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_branch[1] |-> ##1 i_ras.stack_d[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_branch[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_branch[1] |-> ##1 i_ras.data_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_branch[1] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_branch[1] |-> ##1 i_ras.stack_d[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_branch[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_branch[1] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_n[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_branch[1] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.write_pointer_n[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_branch[1] |-> ##1 i_ras.stack_q[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_branch[1] |-> ##1 ras_predict.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[0] |-> ##1 i_instr_realign.unaligned_d);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[0] |-> ##1 i_ras.stack_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[0] |-> ##1 i_ras.stack_d[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[0] |-> ##1 i_instr_queue.instr_queue_empty[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[0] |-> ##1 i_ras.data_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[0] |-> ##1 gen_instr_scan[0].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[0] |-> ##1 i_ras.stack_d[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[0] |-> ##1 i_instr_queue.idx_ds_d[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[0] |-> ##1 i_instr_queue.idx_ds_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[0] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[0] |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[0] |-> ##1 i_ras.stack_q[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[0] |-> ##1 ras_predict.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[1] |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[1] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[1] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.usage_o[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[1] |-> ##1 i_ras.stack_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[1] |-> ##1 i_instr_queue.instr_queue_usage[1][1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[1] |-> ##1 i_ras.data_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[1] |-> ##1 i_instr_queue.instr_queue_usage[0][1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[1] |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[1] |-> ##1 i_ras.stack_d[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[1] |-> ##1 ras_predict.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_call[1] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.usage_o[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[0] |-> ##1 i_instr_realign.unaligned_d);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[0] |-> ##1 i_ras.stack_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[0] |-> ##1 i_ras.stack_d[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[0] |-> ##1 i_instr_queue.instr_queue_empty[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[0] |-> ##1 i_ras.data_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[0] |-> ##1 gen_instr_scan[0].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[0] |-> ##1 i_ras.stack_d[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[0] |-> ##1 i_instr_queue.idx_ds_d[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[0] |-> ##1 i_instr_queue.idx_ds_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[0] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[0] |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[0] |-> ##1 i_ras.stack_q[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[0] |-> ##1 ras_predict.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[1] |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[1] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[1] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.usage_o[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[1] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[1] |-> ##1 i_ras.stack_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[1] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[1] |-> ##1 i_instr_queue.instr_queue_usage[1][1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[1] |-> ##1 i_ras.data_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[1] |-> ##1 i_instr_queue.instr_queue_usage[0][1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[1] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[1] |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[1] |-> ##1 i_ras.stack_d[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[1] |-> ##1 ras_predict.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jalr[1] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.usage_o[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jr[0] |-> ##1 gen_instr_scan[0].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jr[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jr[1] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jump[0] |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jump[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jump[1] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jump[1] |-> ##1 i_ras.stack_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jump[1] |-> ##1 i_ras.stack_d[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jump[1] |-> ##1 i_ras.data_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jump[1] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jump[1] |-> ##1 i_ras.stack_d[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jump[1] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_n[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jump[1] |-> ##1 i_ras.stack_q[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_jump[1] |-> ##1 ras_predict.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_return[0] |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_return[0] |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_return[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvc_return[1] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jalr[0] |-> ##1 btb_prediction_shifted[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jalr[0] |-> ##1 instr_queue_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jalr[0] |-> ##1 i_instr_queue.instr_queue_empty[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jalr[0] |-> ##1 icache_valid_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jalr[0] |-> ##1 i_instr_realign.valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jalr[0] |-> ##1 i_btb.btb_prediction_o[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jalr[0] |-> ##1 if_ready);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jalr[0] |-> ##1 icache_dreq_o.req);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jalr[0] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jalr[0] |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jalr[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jalr[0] |-> ##1 i_instr_realign.unaligned_d);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jalr[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jalr[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jalr[0] |-> ##1 i_instr_queue.ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jalr[0] |-> ##1 btb_prediction[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jalr[0] |-> ##1 i_instr_queue.idx_ds_d[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jalr[0] |-> ##1 i_instr_queue.idx_ds_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) rvi_jalr[0] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.empty_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[0] |-> ##1 gen_instr_scan[0].i_instr_scan.rvc_jump_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[0] |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[0] |-> ##1 i_instr_queue.fetch_entry_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[0] |-> ##1 i_instr_queue.pop_instr[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[0] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.pop_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[0] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.usage_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[0] |-> ##1 gen_instr_scan[0].i_instr_scan.is_rvc);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[0] |-> ##1 rvc_jump[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[0] |-> ##1 i_instr_queue.idx_ds_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[0] |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[0] |-> ##1 i_instr_queue.idx_ds_d[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[0] |-> ##1 i_instr_queue.instr_queue_empty[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[0] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[0] |-> ##1 i_instr_queue.instr_queue_usage[0][0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[1] |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[1] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[1] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[1] |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[1] |-> ##1 i_ras.stack_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[1] |-> ##1 i_ras.stack_d[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[1] |-> ##1 i_ras.data_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[1] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[1] |-> ##1 i_ras.stack_d[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[1] |-> ##1 i_instr_queue.idx_ds_d[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[1] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.write_pointer_n[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[1] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[1] |-> ##1 i_ras.stack_q[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvc_cf[1] |-> ##1 ras_predict.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvi_cf[0] |-> ##1 i_instr_queue.fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvi_cf[0] |-> ##1 i_instr_queue.branch_empty);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvi_cf[0] |-> ##1 i_instr_queue.fetch_entry_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvi_cf[0] |-> ##1 i_instr_queue.gen_instr_fifo[1].i_fifo_instr_data.gate_clock);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvi_cf[0] |-> ##1 fetch_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) taken_rvi_cf[0] |-> ##1 i_instr_queue.gen_instr_fifo[0].i_fifo_instr_data.gate_clock);
ID Stage
In HARM Not in BPS
assert property (@(posedge clk_i) disable iff (!rst_ni) compressed_decoder_i.illegal_instr_o |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) compressed_decoder_i.illegal_instr_o |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) compressed_decoder_i.is_compressed_o |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) compressed_decoder_i.is_compressed_o |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) debug_mode_i |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) debug_mode_i |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) debug_req_i |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) debug_req_i |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instruction.ex.valid |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instruction.ex.valid |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instruction.is_compressed |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instruction.is_compressed |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instruction.use_imm |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instruction.use_imm |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instruction.use_pc |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instruction.use_pc |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instruction.valid |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instruction.valid |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.debug_mode_i |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.debug_mode_i |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.debug_req_i |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.debug_req_i |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.ebreak |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.ebreak |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.illegal_instr |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.illegal_instr |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.instr.atype.aq |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.instr.atype.aq |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.instr.atype.rl |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.instr.atype.rl |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.instr.rvftype.repl[14] |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.instr.rvftype.repl[14] |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.is_compressed_i |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.is_compressed_i |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.is_control_flow_instr_o |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.is_control_flow_instr_o |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.is_illegal_i |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.is_illegal_i |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) fetch_entry_valid_i |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) fetch_entry_valid_i |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_compressed |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_compressed |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_control_flow_instr |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_control_flow_instr |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_illegal |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_illegal |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_ack_i |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_ack_i |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.is_ctrl_flow |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.is_ctrl_flow |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.ex.valid |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.ex.valid |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.is_compressed |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.is_compressed |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.use_imm |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.use_imm |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.use_pc |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.use_pc |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.valid |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.valid |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.valid |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.valid |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_q.is_ctrl_flow |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_q.is_ctrl_flow |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_q.sbe.ex.valid |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_q.sbe.ex.valid |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_q.sbe.is_compressed |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_q.sbe.is_compressed |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_q.sbe.use_imm |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_q.sbe.use_imm |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_q.sbe.use_pc |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_q.sbe.use_pc |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_q.sbe.valid |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_q.sbe.valid |-> ##1 decoder_i.priv_lvl_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_q.valid |-> ##1 decoder_i.priv_lvl_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_q.valid |-> ##1 decoder_i.priv_lvl_i[0]);
In BPS Not in HARM
assert property (@(posedge clk_i) disable iff (!rst_ni) debug_mode_i |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) debug_mode_i |-> ##1 decoder_i.debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.debug_mode_i |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.debug_mode_i |-> ##1 decoder_i.debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.fs_i[0] |-> ##1 decoder_i.fs_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.fs_i[0] |-> ##1 fs_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.fs_i[0] |-> ##1 decoder_i.fs_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.fs_i[0] |-> ##1 fs_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.fs_i[1] |-> ##1 decoder_i.fs_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.fs_i[1] |-> ##1 fs_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.fs_i[1] |-> ##1 decoder_i.fs_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.fs_i[1] |-> ##1 fs_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) fs_i[0] |-> ##1 decoder_i.fs_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) fs_i[0] |-> ##1 fs_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) fs_i[0] |-> ##1 decoder_i.fs_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) fs_i[0] |-> ##1 fs_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) fs_i[1] |-> ##1 decoder_i.fs_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) fs_i[1] |-> ##1 fs_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) fs_i[1] |-> ##1 decoder_i.fs_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) fs_i[1] |-> ##1 fs_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_entry_o.use_pc |-> ##1 issue_q.sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_entry_o.use_pc |-> ##1 issue_n.sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_entry_o.use_pc |-> ##1 issue_entry_o.use_imm);
In Both
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instruction.use_pc |-> ##1 issue_q.sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instruction.use_pc |-> ##1 issue_entry_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoder_i.ebreak |-> ##1 decoder_i.debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.is_ctrl_flow |-> ##1 issue_q.sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.is_ctrl_flow |-> ##1 issue_q.is_ctrl_flow);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.is_ctrl_flow |-> ##1 issue_entry_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.is_ctrl_flow |-> ##1 is_ctrl_flow_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.ex.valid |-> ##1 issue_entry_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.ex.valid |-> ##1 issue_q.sbe.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.ex.valid |-> ##1 issue_entry_o.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.ex.valid |-> ##1 issue_q.sbe.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.is_compressed |-> ##1 issue_q.sbe.is_compressed);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.is_compressed |-> ##1 issue_entry_o.is_compressed);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.use_imm |-> ##1 issue_q.sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.use_imm |-> ##1 issue_entry_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.use_pc |-> ##1 issue_entry_o.use_pc);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.use_pc |-> ##1 issue_entry_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.use_pc |-> ##1 issue_n.sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.use_pc |-> ##1 issue_q.sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.use_pc |-> ##1 issue_q.sbe.use_pc);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.valid |-> ##1 issue_entry_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.valid |-> ##1 issue_q.sbe.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.valid |-> ##1 issue_entry_o.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.sbe.valid |-> ##1 issue_q.sbe.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.valid |-> ##1 issue_q.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_n.valid |-> ##1 issue_entry_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_q.sbe.use_pc |-> ##1 issue_n.sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_q.sbe.use_pc |-> ##1 issue_q.sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_q.sbe.use_pc |-> ##1 issue_entry_o.use_imm);
Issue Stage
In HARM Not in BPS
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_ack_i[0] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_ack_i[0] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_ack_i[1] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_ack_i[1] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.ex.valid |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.ex.valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.is_compressed |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.is_compressed |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.use_imm |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.use_imm |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.use_pc |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.use_pc |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.valid |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_valid_i |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_valid_i |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) flu_ready_i |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) flu_ready_i |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_unissued_instr_i |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_unissued_instr_i |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_o |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_o |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_o |-> ##1 i_scoreboard.i_popcount.right_child_result[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_q |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_q |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_q |-> ##1 i_scoreboard.i_popcount.right_child_result[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_o |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_o |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_o |-> ##1 i_scoreboard.i_popcount.right_child_result[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_q |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_q |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_q |-> ##1 i_scoreboard.i_popcount.right_child_result[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_o |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_o |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_o |-> ##1 i_scoreboard.i_popcount.right_child_result[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_q |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_q |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_q |-> ##1 i_scoreboard.i_popcount.right_child_result[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.flu_ready_i |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.flu_ready_i |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.flush_i |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.flush_i |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.fpu_valid_o |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.fpu_valid_q |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.is_compressed_instr_o |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.is_compressed_instr_o |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_ack_o |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_ack_o |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.ex.valid |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.ex.valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.is_compressed |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.is_compressed |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.use_imm |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.use_imm |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.use_pc |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.use_pc |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.valid |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_valid_i |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_valid_i |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_o |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_o |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_q |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_q |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_o |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_q |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.orig_instr.atype.aq |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.orig_instr.atype.aq |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.orig_instr.atype.aq |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.orig_instr.atype.aq |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.orig_instr.atype.rl |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.orig_instr.atype.rl |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.orig_instr.atype.rl |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.orig_instr.atype.rl |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.orig_instr.rvftype.repl[14] |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.orig_instr.rvftype.repl[14] |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.orig_instr.rvftype.repl[14] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.orig_instr.rvftype.repl[14] |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.orig_instr.rvftype.repl[14] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.orig_instr.rvftype.repl[14] |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.orig_instr.rvftype.repl[14] |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.orig_instr.rvftype.repl[14] |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.orig_instr.rvftype.repl[14] |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.orig_instr.rvftype.repl[14] |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.orig_instr.rvftype.repl[14] |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.orig_instr.rvftype.repl[14] |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.orig_instr.rvftype.repl[14] |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.stall |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.stall |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.stall |-> ##1 i_issue_read_operands.orig_instr.rvftype.repl[14]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.we_fpr_i[0] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.we_gpr_i[0] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.we_gpr_i[0] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.we_gpr_i[1] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.we_gpr_i[1] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.we_pack[0] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.we_pack[0] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.we_pack[1] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.we_pack[1] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.flush_i |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.flush_unissied_instr_i |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.flush_unissied_instr_i |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_ack_i |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_ack_i |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_ack_o |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_ack_o |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.ex.valid |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.ex.valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.is_compressed |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.is_compressed |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.use_imm |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.use_imm |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.use_pc |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.use_pc |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.valid |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.ex.valid |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.ex.valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.is_compressed |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.is_compressed |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.use_imm |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.use_imm |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.use_pc |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.use_pc |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.valid |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_valid_i |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_valid_i |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_valid_o |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_valid_o |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_ack_i[0] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_ack_i[0] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_ack_i[1] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_ack_i[1] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].is_compressed |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].is_compressed |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].use_imm |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].use_imm |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].use_pc |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].valid |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[1].ex.valid |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[1].is_compressed |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[1].is_compressed |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[1].use_imm |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[1].use_imm |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[1].use_pc |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[1].valid |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[1].valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_ack_o |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_ack_o |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.ex.valid |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.ex.valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.is_compressed |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.is_compressed |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.use_imm |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.use_imm |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.use_pc |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.use_pc |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.valid |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_valid_i |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_valid_i |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.flush_i |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.flush_unissued_instr_i |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.flush_unissued_instr_i |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.data_i[0] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.data_i[0] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.data_i[1] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.data_i[1] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.left_child_result[0] |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.left_child_result[0] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.left_child_result[0] |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.left_child_result[0] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.padded_input[0] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.padded_input[0] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.padded_input[1] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.padded_input[1] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.popcount_o[0] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.popcount_o[0] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.popcount_o[1] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.popcount_o[1] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.right_child_result[0] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.right_child_result[0] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.right_child_result[0] |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.right_child_result[0] |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.right_child_result[0] |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_ack_i |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_ack_i |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_en |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_en |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_issue_read_operands.orig_instr.atype.aq);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.i_popcount.left_child_result[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.i_popcount.right_child_result[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.ex.valid |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.ex.valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.is_compressed |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.is_compressed |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.use_imm |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.use_imm |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.use_pc |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.use_pc |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.valid |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_valid_o |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_valid_o |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].is_rd_fpr_flag |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].issued |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].issued |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.is_compressed |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.is_compressed |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.use_pc |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 i_scoreboard.i_popcount.right_child_result[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].is_rd_fpr_flag |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].issued |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].issued |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.ex.valid |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.is_compressed |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.is_compressed |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.use_pc |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.valid |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.num_commit[0] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.num_commit[0] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.num_commit[1] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.num_commit[1] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_mispredict |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_mispredict |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_mispredict |-> ##1 i_scoreboard.i_popcount.right_child_result[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_taken |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_taken |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_taken |-> ##1 i_scoreboard.i_popcount.right_child_result[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.valid |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.valid |-> ##1 i_scoreboard.i_popcount.right_child_result[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_issue_read_operands.orig_instr.atype.aq);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.i_popcount.left_child_result[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.i_popcount.right_child_result[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[0] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[0] |-> ##1 i_scoreboard.i_popcount.right_child_result[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 i_scoreboard.i_popcount.right_child_result[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_scoreboard.i_popcount.right_child_result[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_issue_read_operands.orig_instr.rvftype.repl[14]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[3] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[3] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[3] |-> ##1 i_scoreboard.i_popcount.right_child_result[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_ctrl_flow_i |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_ctrl_flow_i |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_ack_iro_sb |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_ack_iro_sb |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_ack_sb_rename |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_ack_sb_rename |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.ex.valid |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.ex.valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.is_compressed |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.is_compressed |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.use_imm |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.use_imm |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.use_pc |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.use_pc |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.valid |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.ex.valid |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.ex.valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.is_compressed |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.is_compressed |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.use_imm |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.use_imm |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.use_pc |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.use_pc |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.valid |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_valid_rename_sb |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_valid_rename_sb |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_valid_sb_iro |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_valid_sb_iro |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolve_branch_i |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolve_branch_i |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolve_branch_i |-> ##1 i_scoreboard.i_popcount.right_child_result[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 i_scoreboard.i_popcount.right_child_result[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 i_scoreboard.i_popcount.right_child_result[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 i_scoreboard.i_popcount.right_child_result[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) we_fpr_i[0] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) we_gpr_i[0] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) we_gpr_i[0] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) we_gpr_i[1] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) we_gpr_i[1] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[0] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[0] |-> ##1 i_scoreboard.i_popcount.right_child_result[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 i_scoreboard.i_popcount.right_child_result[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_scoreboard.i_popcount.right_child_result[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_issue_read_operands.orig_instr.rvftype.repl[14]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[3] |-> ##1 i_issue_read_operands.fpu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[3] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[3] |-> ##1 i_scoreboard.i_popcount.right_child_result[0]);
In BPS Not in HARM
assert property (@(posedge clk_i) disable iff (!rst_ni) alu_valid_o |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) alu_valid_o |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) alu_valid_o |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) alu_valid_o |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) alu_valid_o |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) alu_valid_o |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) alu_valid_o |-> ##1 i_scoreboard.num_commit[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) alu_valid_o |-> ##1 we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) alu_valid_o |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) alu_valid_o |-> ##1 i_scoreboard.i_popcount.popcount_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) alu_valid_o |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) alu_valid_o |-> ##1 i_issue_read_operands.we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) alu_valid_o |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) alu_valid_o |-> ##1 i_issue_read_operands.we_pack[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) alu_valid_o |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) branch_valid_o |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) branch_valid_o |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) branch_valid_o |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) branch_valid_o |-> ##1 we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) branch_valid_o |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) branch_valid_o |-> ##1 i_issue_read_operands.we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) branch_valid_o |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) branch_valid_o |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) branch_valid_o |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) branch_valid_o |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) branch_valid_o |-> ##1 i_scoreboard.num_commit[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) branch_valid_o |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) branch_valid_o |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) branch_valid_o |-> ##1 i_scoreboard.i_popcount.popcount_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) branch_valid_o |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) branch_valid_o |-> ##1 i_issue_read_operands.we_pack[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) branch_valid_o |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) branch_valid_o |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_ack_i[0] |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].ex.valid |-> ##1 decoded_instr_i.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].ex.valid |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].ex.valid |-> ##1 i_scoreboard.issue_instr_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].ex.valid |-> ##1 i_re_name.issue_instr_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].ex.valid |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].ex.valid |-> ##1 issue_instr_rename_sb.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].ex.valid |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].ex.valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].ex.valid |-> ##1 i_re_name.issue_instr_i.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].ex.valid |-> ##1 i_scoreboard.decoded_instr_i.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].ex.valid |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].ex.valid |-> ##1 i_issue_read_operands.issue_instr_i.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].ex.valid |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].ex.valid |-> ##1 i_re_name.issue_instr_o.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].ex.valid |-> ##1 issue_instr_sb_iro.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].ex.valid |-> ##1 issue_instr_sb_iro.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].ex.valid |-> ##1 i_scoreboard.decoded_instr_i.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].ex.valid |-> ##1 i_issue_read_operands.issue_instr_i.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].ex.valid |-> ##1 i_re_name.issue_instr_i.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].ex.valid |-> ##1 i_scoreboard.issue_instr_o.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].ex.valid |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].ex.valid |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].ex.valid |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].ex.valid |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].ex.valid |-> ##1 decoded_instr_i.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].ex.valid |-> ##1 issue_instr_rename_sb.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].is_compressed |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].is_compressed |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].use_imm |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].use_imm |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].use_pc |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].use_pc |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].use_pc |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].use_pc |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].valid |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].valid |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].valid |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[0].valid |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[1].ex.valid |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[1].ex.valid |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[1].ex.valid |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[1].ex.valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[1].is_compressed |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[1].is_compressed |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[1].use_imm |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[1].use_imm |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[1].use_pc |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[1].use_pc |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[1].use_pc |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[1].use_pc |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[1].use_pc |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[1].use_pc |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[1].use_pc |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[1].use_pc |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[1].valid |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_o[1].valid |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_valid_o |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_valid_o |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_valid_o |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_valid_o |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_valid_o |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_valid_o |-> ##1 i_scoreboard.num_commit[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_valid_o |-> ##1 we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_valid_o |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_valid_o |-> ##1 i_scoreboard.i_popcount.popcount_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_valid_o |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_valid_o |-> ##1 i_issue_read_operands.we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_valid_o |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_valid_o |-> ##1 i_issue_read_operands.we_pack[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_valid_o |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_ack_o |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_ack_o |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.use_pc |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_valid_i |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_valid_i |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_unissued_instr_i |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) fpu_valid_o |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) fpu_valid_o |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) fpu_valid_o |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) fpu_valid_o |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_o |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_o |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_o |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_o |-> ##1 we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_q |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_q |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_q |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_q |-> ##1 we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_o |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_o |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_o |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_o |-> ##1 we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_q |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_q |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_q |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_q |-> ##1 we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_o |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_o |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_o |-> ##1 we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_q |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_q |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_q |-> ##1 we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.flush_i |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.fpu_valid_o |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.fpu_valid_o |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.fpu_valid_q |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.fpu_valid_q |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_ack_o |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_ack_o |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.use_pc |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_valid_i |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_valid_i |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_o |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_q |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_o |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_o |-> ##1 decoded_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_o |-> ##1 wt_valid_i[3]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_q |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_q |-> ##1 decoded_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_q |-> ##1 wt_valid_i[3]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.stall |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.we_fpr_i[0] |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.we_fpr_i[0] |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.we_gpr_i[0] |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.we_pack[0] |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.flush_i |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.flush_i |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.flush_unissied_instr_i |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_ack_i |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_ack_i |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_ack_o |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_ack_o |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.use_pc |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.use_pc |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_valid_i |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_valid_i |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_valid_o |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_valid_o |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_ack_i[0] |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].use_imm |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].use_imm |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].use_pc |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].valid |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[1].ex.valid |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[1].use_imm |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[1].use_imm |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[1].use_pc |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_ack_o |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_ack_o |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.use_pc |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_valid_i |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_valid_i |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.flush_i |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.flush_i |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.flush_unissued_instr_i |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.data_i[0] |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.left_child_result |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.left_child_result |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.padded_input[0] |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.popcount_o[0] |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.right_child_result |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.right_child_result |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.right_child_result |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.right_child_result |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_ack_i |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_ack_i |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_en |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_en |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 decoded_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 commit_ack_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.i_popcount.left_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 we_gpr_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.use_pc |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_valid_o |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_valid_o |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].is_rd_fpr_flag |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].is_rd_fpr_flag |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 flush_unissued_instr_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 flush_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.use_imm |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.use_imm |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].is_rd_fpr_flag |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].is_rd_fpr_flag |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].issued |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.ex.valid |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.ex.valid |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.use_imm |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.use_imm |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.valid |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.num_commit[0] |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_mispredict |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_mispredict |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_mispredict |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_mispredict |-> ##1 we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_taken |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_taken |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_taken |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_taken |-> ##1 we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.valid |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.valid |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.valid |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.valid |-> ##1 we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 decoded_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 commit_ack_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.i_popcount.left_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 we_gpr_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[0] |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[0] |-> ##1 we_fpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[0] |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[0] |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[0] |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 decoded_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[3] |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[3] |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[3] |-> ##1 we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_compressed_instr_o |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_compressed_instr_o |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_ack_iro_sb |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_ack_iro_sb |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_ack_sb_rename |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_ack_sb_rename |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.use_pc |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.use_pc |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_valid_rename_sb |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_valid_rename_sb |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_valid_sb_iro |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_valid_sb_iro |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_valid_o |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_valid_o |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_valid_o |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_valid_o |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_valid_o |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_valid_o |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_valid_o |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_valid_o |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_valid_o |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_valid_o |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_valid_o |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_valid_o |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_valid_o |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_valid_o |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_o |-> ##1 issue_instr_valid_rename_sb);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_o |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_o |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_o |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_o |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_o |-> ##1 i_re_name.issue_instr_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_o |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_o |-> ##1 issue_instr_valid_sb_iro);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_o |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_o |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_o |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_o |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_o |-> ##1 i_re_name.issue_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_o |-> ##1 decoded_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_o |-> ##1 i_scoreboard.wt_valid_i[3]);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_o |-> ##1 i_scoreboard.decoded_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_o |-> ##1 wt_valid_i[3]);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_o |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_o |-> ##1 i_scoreboard.issue_instr_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_o |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_o |-> ##1 i_issue_read_operands.issue_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_o |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolve_branch_i |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolve_branch_i |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolve_branch_i |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolve_branch_i |-> ##1 we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.num_commit[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 issue_instr_valid_rename_sb);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 issue_ack_iro_sb);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.commit_ack_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_re_name.issue_instr_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 commit_instr_o[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_issue_read_operands.we_gpr_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.i_popcount.left_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_re_name.issue_ack_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 we_gpr_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.mem_n[0].sbe.is_compressed);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.mem_q[0].sbe.is_compressed);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 decoded_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.mem_n[0].sbe.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.decoded_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.mem_n[0].issued);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.i_popcount.padded_input[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 commit_ack_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_issue_read_operands.issue_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 decoded_instr_ack_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.issue_ack_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_re_name.issue_ack_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.commit_instr_o[0].is_compressed);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_issue_read_operands.issue_ack_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.commit_instr_o[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 issue_instr_valid_sb_iro);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_issue_read_operands.we_pack[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_issue_read_operands.we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 commit_instr_o[0].is_compressed);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 issue_ack_sb_rename);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.decoded_instr_ack_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.i_popcount.popcount_o[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_re_name.issue_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.issue_instr_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.issue_en);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.mem_q[0].sbe.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.i_popcount.data_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_scoreboard.mem_q[0].issued);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 i_issue_read_operands.we_pack[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) sb_full_o |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) we_fpr_i[0] |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) we_fpr_i[0] |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) we_gpr_i[0] |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[0] |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[0] |-> ##1 we_fpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[0] |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[0] |-> ##1 lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[0] |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 decoded_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[3] |-> ##1 i_scoreboard.i_popcount.right_child_result);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[3] |-> ##1 commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[3] |-> ##1 we_gpr_i[0]);
In Both
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_ack_i[0] |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_ack_i[0] |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_ack_i[0] |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_ack_i[1] |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_ack_i[1] |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.ex.valid |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.ex.valid |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.is_compressed |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.is_compressed |-> ##1 is_compressed_instr_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.is_compressed |-> ##1 i_issue_read_operands.is_compressed_instr_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.is_compressed |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.use_imm |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.use_imm |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.use_pc |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.use_pc |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.use_pc |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.use_pc |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.use_pc |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.use_pc |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.use_pc |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.use_pc |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.use_pc |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.use_pc |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.use_pc |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.valid |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) decoded_instr_i.valid |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_unissued_instr_i |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_unissued_instr_i |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_unissued_instr_i |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_unissued_instr_i |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_unissued_instr_i |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_o |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_o |-> ##1 i_scoreboard.num_commit[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_o |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_o |-> ##1 i_issue_read_operands.we_pack[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_o |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_o |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_o |-> ##1 i_scoreboard.i_popcount.popcount_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_o |-> ##1 i_issue_read_operands.we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_o |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_o |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_o |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_o |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_q |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_q |-> ##1 i_scoreboard.num_commit[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_q |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_q |-> ##1 i_issue_read_operands.we_pack[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_q |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_q |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_q |-> ##1 i_scoreboard.i_popcount.popcount_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_q |-> ##1 i_issue_read_operands.we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_q |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_q |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_q |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.alu_valid_q |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_o |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_o |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_o |-> ##1 i_scoreboard.num_commit[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_o |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_o |-> ##1 i_issue_read_operands.we_pack[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_o |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_o |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_o |-> ##1 i_scoreboard.i_popcount.popcount_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_o |-> ##1 i_issue_read_operands.we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_o |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_o |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_o |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_o |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_o |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_q |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_q |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_q |-> ##1 i_scoreboard.num_commit[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_q |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_q |-> ##1 i_issue_read_operands.we_pack[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_q |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_q |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_q |-> ##1 i_scoreboard.i_popcount.popcount_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_q |-> ##1 i_issue_read_operands.we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_q |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_q |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_q |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_q |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.branch_valid_q |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_o |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_o |-> ##1 i_scoreboard.num_commit[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_o |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_o |-> ##1 i_issue_read_operands.we_pack[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_o |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_o |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_o |-> ##1 i_scoreboard.i_popcount.popcount_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_o |-> ##1 i_issue_read_operands.we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_o |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_o |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_o |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_q |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_q |-> ##1 i_scoreboard.num_commit[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_q |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_q |-> ##1 i_issue_read_operands.we_pack[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_q |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_q |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_q |-> ##1 i_scoreboard.i_popcount.popcount_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_q |-> ##1 i_issue_read_operands.we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_q |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_q |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.csr_valid_q |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.flush_i |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.flush_i |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.flush_i |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.flush_i |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.flush_i |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.fpu_valid_o |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.fpu_valid_o |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.fpu_valid_q |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.fpu_valid_q |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.is_compressed_instr_o |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.is_compressed_instr_o |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.ex.valid |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.ex.valid |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.is_compressed |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.is_compressed |-> ##1 is_compressed_instr_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.is_compressed |-> ##1 i_issue_read_operands.is_compressed_instr_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.is_compressed |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.use_imm |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.use_imm |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.use_pc |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.use_pc |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.use_pc |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.use_pc |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.use_pc |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.use_pc |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.use_pc |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.use_pc |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.use_pc |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.use_pc |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.use_pc |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.valid |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.issue_instr_i.valid |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_o |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_o |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_o |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_o |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_o |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_o |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_o |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_o |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_o |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_o |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_o |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_o |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_o |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_q |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_q |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_q |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_q |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_q |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_q |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_q |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_q |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_q |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_q |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_q |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_q |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.lsu_valid_q |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_o |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_o |-> ##1 i_issue_read_operands.issue_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_o |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_o |-> ##1 i_re_name.issue_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_o |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_o |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_o |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_o |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_o |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_o |-> ##1 issue_instr_valid_rename_sb);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_o |-> ##1 issue_instr_valid_sb_iro);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_o |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_o |-> ##1 i_scoreboard.issue_instr_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_o |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_o |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_o |-> ##1 i_scoreboard.wt_valid_i[3]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_o |-> ##1 i_re_name.issue_instr_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_o |-> ##1 i_scoreboard.decoded_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_o |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_q |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_q |-> ##1 i_issue_read_operands.issue_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_q |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_q |-> ##1 i_re_name.issue_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_q |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_q |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_q |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_q |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_q |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_q |-> ##1 issue_instr_valid_rename_sb);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_q |-> ##1 issue_instr_valid_sb_iro);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_q |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_q |-> ##1 i_scoreboard.issue_instr_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_q |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_q |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_q |-> ##1 i_scoreboard.wt_valid_i[3]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_q |-> ##1 i_re_name.issue_instr_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_q |-> ##1 i_scoreboard.decoded_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.mult_valid_q |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.stall |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.stall |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.stall |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.stall |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.stall |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.stall |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.stall |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.stall |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.stall |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.stall |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.stall |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.stall |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.stall |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.stall |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.stall |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.we_fpr_i[0] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.we_fpr_i[0] |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.we_gpr_i[0] |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.we_gpr_i[0] |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.we_gpr_i[0] |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.we_gpr_i[1] |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.we_gpr_i[1] |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.we_pack[0] |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.we_pack[0] |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.we_pack[0] |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.we_pack[1] |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_issue_read_operands.we_pack[1] |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.flush_i |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.flush_i |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.flush_i |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.flush_i |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.flush_i |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.flush_i |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.flush_i |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.flush_i |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.flush_unissied_instr_i |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.flush_unissied_instr_i |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.flush_unissied_instr_i |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.flush_unissied_instr_i |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.flush_unissied_instr_i |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.ex.valid |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.ex.valid |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.is_compressed |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.is_compressed |-> ##1 is_compressed_instr_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.is_compressed |-> ##1 i_issue_read_operands.is_compressed_instr_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.is_compressed |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.use_imm |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.use_imm |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.use_pc |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.use_pc |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.use_pc |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.use_pc |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.use_pc |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.use_pc |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.use_pc |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.use_pc |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.use_pc |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.use_pc |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.use_pc |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.valid |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_i.valid |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.ex.valid |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.ex.valid |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.is_compressed |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.is_compressed |-> ##1 is_compressed_instr_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.is_compressed |-> ##1 i_issue_read_operands.is_compressed_instr_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.is_compressed |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.use_imm |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.use_imm |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.use_pc |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.use_pc |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.use_pc |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.use_pc |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.use_pc |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.use_pc |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.use_pc |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.use_pc |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.use_pc |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.use_pc |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.use_pc |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.valid |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_re_name.issue_instr_o.valid |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_ack_i[0] |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_ack_i[0] |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_ack_i[0] |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_ack_i[1] |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_ack_i[1] |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 i_scoreboard.issue_instr_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 issue_instr_rename_sb.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 i_scoreboard.decoded_instr_i.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 i_scoreboard.issue_instr_o.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 issue_instr_rename_sb.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 decoded_instr_i.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 issue_instr_sb_iro.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 i_re_name.issue_instr_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 i_re_name.issue_instr_o.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 i_issue_read_operands.issue_instr_i.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 i_issue_read_operands.issue_instr_i.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 i_re_name.issue_instr_i.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 i_scoreboard.decoded_instr_i.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 i_re_name.issue_instr_i.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 decoded_instr_i.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 issue_instr_sb_iro.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].ex.valid |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].is_compressed |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].is_compressed |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].use_pc |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].use_pc |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].use_pc |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].valid |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].valid |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[0].valid |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[1].ex.valid |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[1].ex.valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[1].ex.valid |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[1].is_compressed |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[1].is_compressed |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[1].use_pc |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[1].use_pc |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[1].use_pc |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[1].use_pc |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[1].use_pc |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[1].use_pc |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[1].use_pc |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[1].valid |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.commit_instr_o[1].valid |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.ex.valid |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.ex.valid |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.is_compressed |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.is_compressed |-> ##1 is_compressed_instr_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.is_compressed |-> ##1 i_issue_read_operands.is_compressed_instr_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.is_compressed |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.use_imm |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.use_imm |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.use_pc |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.use_pc |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.use_pc |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.use_pc |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.use_pc |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.use_pc |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.use_pc |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.use_pc |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.use_pc |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.use_pc |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.use_pc |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.valid |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.decoded_instr_i.valid |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.flush_i |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.flush_i |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.flush_i |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.flush_i |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.flush_i |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.flush_i |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.flush_i |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.flush_i |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.flush_unissued_instr_i |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.flush_unissued_instr_i |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.flush_unissued_instr_i |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.flush_unissued_instr_i |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.flush_unissued_instr_i |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.data_i[0] |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.data_i[0] |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.data_i[0] |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.data_i[1] |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.data_i[1] |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.padded_input[0] |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.padded_input[0] |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.padded_input[0] |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.padded_input[1] |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.padded_input[1] |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.popcount_o[0] |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.popcount_o[0] |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.popcount_o[0] |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.popcount_o[1] |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.i_popcount.popcount_o[1] |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.mem_q[0].issued);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_re_name.issue_ack_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_issue_read_operands.issue_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_re_name.issue_ack_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.issue_en);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.i_popcount.padded_input[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_re_name.issue_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.i_popcount.data_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.issue_ack_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_issue_read_operands.we_gpr_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.num_commit[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.i_popcount.popcount_o[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_issue_read_operands.we_pack[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_issue_read_operands.we_pack[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.mem_q[0].sbe.is_compressed);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 commit_instr_o[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 issue_instr_valid_rename_sb);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_issue_read_operands.issue_ack_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.mem_n[0].sbe.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 issue_instr_valid_sb_iro);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.commit_ack_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_issue_read_operands.we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.issue_instr_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.decoded_instr_ack_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 decoded_instr_ack_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.mem_n[0].issued);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.commit_instr_o[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.mem_n[0].sbe.is_compressed);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.commit_instr_o[0].is_compressed);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 issue_ack_iro_sb);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 issue_ack_sb_rename);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 commit_instr_o[0].is_compressed);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_re_name.issue_instr_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.decoded_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_scoreboard.mem_q[0].sbe.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_full |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.ex.valid |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.ex.valid |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.is_compressed |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.is_compressed |-> ##1 is_compressed_instr_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.is_compressed |-> ##1 i_issue_read_operands.is_compressed_instr_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.is_compressed |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.use_imm |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.use_imm |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.use_pc |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.use_pc |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.use_pc |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.use_pc |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.use_pc |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.use_pc |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.use_pc |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.use_pc |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.use_pc |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.use_pc |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.use_pc |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.valid |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.issue_instr_o.valid |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].is_rd_fpr_flag |-> ##1 i_scoreboard.mem_q[0].is_rd_fpr_flag);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].is_rd_fpr_flag |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].is_rd_fpr_flag |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].issued |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].issued |-> ##1 i_scoreboard.mem_q[0].issued);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].issued |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].issued |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].issued |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].issued |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].issued |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].issued |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].issued |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].issued |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].issued |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].issued |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].issued |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 i_scoreboard.mem_q[0].issued);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 i_scoreboard.issue_instr_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 issue_instr_rename_sb.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 i_scoreboard.decoded_instr_i.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 i_re_name.flush_unissied_instr_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 i_scoreboard.flush_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 i_scoreboard.issue_instr_o.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 issue_instr_rename_sb.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 decoded_instr_i.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 i_re_name.flush_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 issue_instr_sb_iro.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 i_re_name.issue_instr_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 i_scoreboard.flush_unissued_instr_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 i_issue_read_operands.flush_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 i_re_name.issue_instr_o.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 i_issue_read_operands.issue_instr_i.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 commit_instr_o[0].ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 i_issue_read_operands.issue_instr_i.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 i_scoreboard.commit_instr_o[0].ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 i_re_name.issue_instr_i.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 i_scoreboard.decoded_instr_i.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 i_re_name.issue_instr_i.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 decoded_instr_i.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 i_scoreboard.mem_q[0].sbe.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 issue_instr_sb_iro.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 i_scoreboard.mem_q[0].sbe.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.ex.valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.is_compressed |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.is_compressed |-> ##1 i_scoreboard.mem_q[0].sbe.is_compressed);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.is_compressed |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.use_pc |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.use_pc |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.use_pc |-> ##1 i_scoreboard.mem_q[0].sbe.use_pc);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 i_scoreboard.mem_q[0].issued);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 i_scoreboard.num_commit[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 i_issue_read_operands.we_pack[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 i_issue_read_operands.we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 i_scoreboard.i_popcount.popcount_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 i_scoreboard.mem_q[0].sbe.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_n[0].sbe.valid |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].is_rd_fpr_flag |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].is_rd_fpr_flag |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].issued |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].issued |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].issued |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].issued |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].issued |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].issued |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].issued |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].issued |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].issued |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].issued |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].issued |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.ex.valid |-> ##1 issue_instr_rename_sb.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.ex.valid |-> ##1 i_scoreboard.decoded_instr_i.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.ex.valid |-> ##1 i_re_name.issue_instr_i.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.ex.valid |-> ##1 i_scoreboard.decoded_instr_i.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.ex.valid |-> ##1 i_re_name.issue_instr_o.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.ex.valid |-> ##1 i_issue_read_operands.issue_instr_i.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.ex.valid |-> ##1 i_re_name.issue_instr_i.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.ex.valid |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.ex.valid |-> ##1 i_issue_read_operands.issue_instr_i.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.ex.valid |-> ##1 decoded_instr_i.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.ex.valid |-> ##1 i_scoreboard.issue_instr_o.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.ex.valid |-> ##1 i_scoreboard.issue_instr_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.ex.valid |-> ##1 decoded_instr_i.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.ex.valid |-> ##1 issue_instr_sb_iro.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.ex.valid |-> ##1 issue_instr_rename_sb.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.ex.valid |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.ex.valid |-> ##1 issue_instr_sb_iro.ex.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.ex.valid |-> ##1 i_re_name.issue_instr_o.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.is_compressed |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.is_compressed |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.use_pc |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.use_pc |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.valid |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.valid |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.valid |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.valid |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.valid |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.valid |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.valid |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.valid |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.valid |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.valid |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.mem_q[0].sbe.valid |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.num_commit[0] |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.num_commit[0] |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.num_commit[0] |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.num_commit[1] |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.num_commit[1] |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_mispredict |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_mispredict |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_mispredict |-> ##1 i_scoreboard.num_commit[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_mispredict |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_mispredict |-> ##1 i_issue_read_operands.we_pack[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_mispredict |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_mispredict |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_mispredict |-> ##1 i_scoreboard.i_popcount.popcount_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_mispredict |-> ##1 i_issue_read_operands.we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_mispredict |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_mispredict |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_mispredict |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_mispredict |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_mispredict |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_taken |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_taken |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_taken |-> ##1 i_scoreboard.num_commit[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_taken |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_taken |-> ##1 i_issue_read_operands.we_pack[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_taken |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_taken |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_taken |-> ##1 i_scoreboard.i_popcount.popcount_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_taken |-> ##1 i_issue_read_operands.we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_taken |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_taken |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_taken |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_taken |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.is_taken |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.valid |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.valid |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.valid |-> ##1 i_scoreboard.num_commit[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.valid |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.valid |-> ##1 i_issue_read_operands.we_pack[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.valid |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.valid |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.valid |-> ##1 i_scoreboard.i_popcount.popcount_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.valid |-> ##1 i_issue_read_operands.we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.valid |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.valid |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.valid |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.valid |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.resolved_branch_i.valid |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.mem_q[0].issued);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_re_name.issue_ack_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_issue_read_operands.issue_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_re_name.issue_ack_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.issue_en);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.i_popcount.padded_input[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_re_name.issue_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.i_popcount.data_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.issue_ack_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_issue_read_operands.we_gpr_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.num_commit[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.i_popcount.popcount_o[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_issue_read_operands.we_pack[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_issue_read_operands.we_pack[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.mem_q[0].sbe.is_compressed);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 commit_instr_o[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 issue_instr_valid_rename_sb);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_issue_read_operands.issue_ack_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.mem_n[0].sbe.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 issue_instr_valid_sb_iro);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.commit_ack_i[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_issue_read_operands.we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.issue_instr_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.decoded_instr_ack_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 decoded_instr_ack_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.mem_n[0].issued);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.commit_instr_o[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.mem_n[0].sbe.is_compressed);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.commit_instr_o[0].is_compressed);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 issue_ack_iro_sb);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 issue_ack_sb_rename);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 commit_instr_o[0].is_compressed);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_re_name.issue_instr_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.decoded_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_scoreboard.mem_q[0].sbe.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.sb_full_o |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[0] |-> ##1 i_issue_read_operands.we_fpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[0] |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[0] |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[0] |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[0] |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[0] |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[0] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[0] |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 i_scoreboard.num_commit[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 i_issue_read_operands.we_pack[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 i_issue_read_operands.we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 i_scoreboard.i_popcount.popcount_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[1] |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_re_name.issue_ack_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_issue_read_operands.issue_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_re_name.issue_ack_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_scoreboard.issue_en);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_re_name.issue_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_scoreboard.issue_ack_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_scoreboard.num_commit[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_issue_read_operands.we_pack[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 issue_instr_valid_rename_sb);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_issue_read_operands.issue_ack_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 issue_instr_valid_sb_iro);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_issue_read_operands.we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_scoreboard.issue_instr_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_scoreboard.decoded_instr_ack_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 decoded_instr_ack_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_scoreboard.i_popcount.popcount_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 issue_ack_iro_sb);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 issue_ack_sb_rename);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_re_name.issue_instr_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_scoreboard.decoded_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[2] |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[3] |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[3] |-> ##1 i_scoreboard.num_commit[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[3] |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[3] |-> ##1 i_issue_read_operands.we_pack[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[3] |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[3] |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[3] |-> ##1 i_scoreboard.i_popcount.popcount_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[3] |-> ##1 i_issue_read_operands.we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[3] |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[3] |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_scoreboard.wt_valid_i[3] |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_ctrl_flow_i |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_ctrl_flow_i |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.ex.valid |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.ex.valid |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.is_compressed |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.is_compressed |-> ##1 is_compressed_instr_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.is_compressed |-> ##1 i_issue_read_operands.is_compressed_instr_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.is_compressed |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.use_imm |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.use_imm |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.use_pc |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.use_pc |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.use_pc |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.use_pc |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.use_pc |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.use_pc |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.use_pc |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.use_pc |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.use_pc |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.use_pc |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.use_pc |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.valid |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_rename_sb.valid |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.ex.valid |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.ex.valid |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.is_compressed |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.is_compressed |-> ##1 is_compressed_instr_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.is_compressed |-> ##1 i_issue_read_operands.is_compressed_instr_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.is_compressed |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.use_imm |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.use_imm |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.use_pc |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.use_pc |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.use_pc |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.use_pc |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.use_pc |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.use_pc |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.use_pc |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.use_pc |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.use_pc |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.use_pc |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.use_pc |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.valid |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) issue_instr_sb_iro.valid |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolve_branch_i |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolve_branch_i |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolve_branch_i |-> ##1 i_scoreboard.num_commit[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolve_branch_i |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolve_branch_i |-> ##1 i_issue_read_operands.we_pack[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolve_branch_i |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolve_branch_i |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolve_branch_i |-> ##1 i_scoreboard.i_popcount.popcount_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolve_branch_i |-> ##1 i_issue_read_operands.we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolve_branch_i |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolve_branch_i |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolve_branch_i |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolve_branch_i |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolve_branch_i |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 i_scoreboard.num_commit[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 i_issue_read_operands.we_pack[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 i_scoreboard.i_popcount.popcount_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 i_issue_read_operands.we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_mispredict |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 i_scoreboard.num_commit[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 i_issue_read_operands.we_pack[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 i_scoreboard.i_popcount.popcount_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 i_issue_read_operands.we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.is_taken |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 i_scoreboard.num_commit[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 i_issue_read_operands.we_pack[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 i_scoreboard.i_popcount.popcount_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 i_issue_read_operands.we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_i.valid |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) we_fpr_i[0] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) we_fpr_i[0] |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) we_gpr_i[0] |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) we_gpr_i[0] |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) we_gpr_i[0] |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) we_gpr_i[1] |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) we_gpr_i[1] |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[0] |-> ##1 i_issue_read_operands.we_fpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[0] |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[0] |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[0] |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[0] |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[0] |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[0] |-> ##1 i_issue_read_operands.lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[0] |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 i_scoreboard.num_commit[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 i_issue_read_operands.we_pack[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 i_issue_read_operands.we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 i_scoreboard.i_popcount.popcount_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[1] |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_re_name.issue_ack_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_issue_read_operands.issue_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_scoreboard.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_re_name.issue_ack_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_scoreboard.issue_en);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_scoreboard.commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_re_name.issue_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_scoreboard.issue_ack_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_scoreboard.decoded_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_scoreboard.num_commit[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_issue_read_operands.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_issue_read_operands.we_pack[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_re_name.issue_instr_i.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 issue_instr_rename_sb.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_issue_read_operands.flu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 issue_instr_valid_rename_sb);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_issue_read_operands.issue_ack_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 issue_instr_valid_sb_iro);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_re_name.issue_instr_o.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_issue_read_operands.we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_scoreboard.issue_instr_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_scoreboard.decoded_instr_ack_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 decoded_instr_ack_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_scoreboard.commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 issue_instr_sb_iro.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_scoreboard.i_popcount.popcount_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 issue_ack_iro_sb);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 issue_ack_sb_rename);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_re_name.issue_instr_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 commit_instr_o[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_scoreboard.decoded_instr_valid_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 i_scoreboard.commit_ack_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[2] |-> ##1 commit_instr_o[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[3] |-> ##1 i_scoreboard.mem_q[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[3] |-> ##1 i_scoreboard.num_commit[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[3] |-> ##1 i_scoreboard.mem_n[0].sbe.use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[3] |-> ##1 i_issue_read_operands.we_pack[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[3] |-> ##1 i_scoreboard.i_popcount.padded_input[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[3] |-> ##1 commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[3] |-> ##1 i_scoreboard.i_popcount.popcount_o[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[3] |-> ##1 i_issue_read_operands.we_gpr_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[3] |-> ##1 i_scoreboard.commit_instr_o[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[3] |-> ##1 i_scoreboard.i_popcount.data_i[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) wt_valid_i[3] |-> ##1 i_scoreboard.commit_ack_i[0]);
Execute Stage
In Harm Not in BPS
assert property (@(posedge clk_i) disable iff (!rst_ni) alu_valid_i |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) alu_valid_i |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) alu_valid_i |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) alu_valid_i |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) branch_valid_i |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) branch_valid_i |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_buffer_i.csr_reg_q.valid |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_buffer_i.csr_reg_q.valid |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_buffer_i.csr_reg_q.valid |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_commit_i |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_commit_i |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_commit_i |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_valid_i |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_valid_i |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_valid_i |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) dcache_req_ports_i[1].data_gnt |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) dcache_req_ports_i[1].data_gnt |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) dcache_req_ports_i[1].data_rvalid |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) dcache_req_ports_i[1].data_rvalid |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) dcache_req_ports_i[2].data_gnt |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) dcache_req_ports_i[2].data_gnt |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) dcache_wbuffer_empty_i |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) dcache_wbuffer_empty_i |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) debug_mode_i |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) fpu_valid_i |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.i_div.state_q[0] |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.i_multiplier.mult_valid_o |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.mul_valid |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_areq_i.fetch_req |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_areq_i.fetch_req |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_areq_i.fetch_req |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_compressed_instr_i |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_compressed_instr_i |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_compressed_instr_i |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_commit_i |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_commit_i |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_commit_i |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.state_q[0] |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.state_q[0] |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.state_q[0] |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.state_q[1] |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[0].valid |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[0].valid |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[0].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_write_pointer_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[0].valid |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[0].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_read_pointer_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[1].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_read_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[1].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_write_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[1].valid |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[1].valid |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[1].valid |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[2].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_read_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[2].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_write_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[2].valid |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[2].valid |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[2].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_write_pointer_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[2].valid |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[2].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_read_pointer_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[3].valid |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[3].valid |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[3].valid |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_read_pointer_q[0] |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_read_pointer_q[0] |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_read_pointer_q[0] |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_read_pointer_q[1] |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_read_pointer_q[1] |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_read_pointer_q[1] |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_write_pointer_q[0] |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_write_pointer_q[0] |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_write_pointer_q[0] |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_read_pointer_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_write_pointer_q[0] |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_write_pointer_q[1] |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_read_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_write_pointer_q[1] |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_write_pointer_q[1] |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_write_pointer_q[1] |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[0].valid |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[0].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_write_pointer_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[0].valid |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[0].valid |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[1].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_write_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[1].valid |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[1].valid |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[1].valid |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[1].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_read_pointer_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[2].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_read_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[2].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_write_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[2].valid |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[2].valid |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[2].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_write_pointer_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[2].valid |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[3].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_read_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[3].valid |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[3].valid |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[3].valid |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[3].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_read_pointer_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_read_pointer_q[0] |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_read_pointer_q[0] |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_read_pointer_q[0] |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_read_pointer_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_read_pointer_q[0] |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_read_pointer_q[1] |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_read_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_read_pointer_q[1] |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_read_pointer_q[1] |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_read_pointer_q[1] |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_write_pointer_q[0] |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_write_pointer_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_write_pointer_q[0] |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_write_pointer_q[0] |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_write_pointer_q[0] |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_write_pointer_q[1] |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_write_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_write_pointer_q[1] |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_write_pointer_q[1] |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_write_pointer_q[1] |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.lsu_bypass_i.mem_q[0].valid |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.lsu_bypass_i.mem_q[1].valid |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.lsu_bypass_i.read_pointer_q |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.lsu_bypass_i.read_pointer_q |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.lsu_bypass_i.read_pointer_q |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.lsu_bypass_i.status_cnt_q[0] |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.lsu_bypass_i.status_cnt_q[1] |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.lsu_bypass_i.write_pointer_q |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.lsu_bypass_i.write_pointer_q |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.lsu_bypass_i.write_pointer_q |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_valid_i |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_valid_i |-> ##1 fpu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_valid_i |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_i |-> ##1 fpu_ready_o);
In BPS Not in HARM
assert property (@(posedge clk_i) disable iff (!rst_ni) branch_valid_i |-> ##1 dcache_wbuffer_empty_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_valid_i |-> ##1 csr_commit_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) dcache_req_ports_i[1].data_gnt |-> ##1 dcache_wbuffer_empty_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) dcache_req_ports_i[1].data_gnt |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) dcache_req_ports_i[1].data_rvalid |-> ##1 dcache_wbuffer_empty_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) dcache_req_ports_i[1].data_rvalid |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) dcache_req_ports_i[2].data_gnt |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) debug_mode_i |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) flu_valid_o |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 dcache_wbuffer_empty_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) fpu_valid_i |-> ##1 dcache_wbuffer_empty_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) fpu_valid_o |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) fpu_valid_o |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) fpu_valid_o |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) fpu_valid_o |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) fpu_valid_o |-> ##1 dcache_wbuffer_empty_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.i_div.div_res_zero_q |-> ##1 i_mult.i_div.div_res_zero_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.i_div.div_res_zero_q |-> ##1 i_mult.i_div.rem_sel_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.i_div.rem_sel_q |-> ##1 i_mult.i_div.div_res_zero_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.i_div.rem_sel_q |-> ##1 i_mult.i_div.rem_sel_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.i_div.state_q[0] |-> ##1 dcache_wbuffer_empty_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.i_multiplier.mult_valid_o |-> ##1 dcache_wbuffer_empty_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.i_multiplier.mult_valid_o |-> ##1 is_compressed_instr_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.mul_valid |-> ##1 dcache_wbuffer_empty_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.mul_valid |-> ##1 is_compressed_instr_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.word_op_q |-> ##1 i_mult.word_op_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.word_op_q |-> ##1 i_mult.i_div.div_res_zero_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.word_op_q |-> ##1 i_mult.i_div.rem_sel_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_compressed_instr_i |-> ##1 dcache_wbuffer_empty_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) load_valid_o |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) load_valid_o |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) load_valid_o |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) load_valid_o |-> ##1 dcache_wbuffer_empty_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) load_valid_o |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_commit_i |-> ##1 dcache_wbuffer_empty_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_commit_i |-> ##1 icache_areq_i.fetch_req);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_commit_i |-> ##1 dcache_req_ports_i[2].data_gnt);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_commit_i |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.state_q[0] |-> ##1 dcache_wbuffer_empty_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.state_q[0] |-> ##1 lsu_commit_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.state_q[0] |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[0].valid |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[1].valid |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[2].valid |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[3].valid |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[0].valid |-> ##1 dcache_wbuffer_empty_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[0].valid |-> ##1 icache_areq_i.fetch_req);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[0].valid |-> ##1 dcache_req_ports_i[2].data_gnt);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[0].valid |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[1].valid |-> ##1 dcache_wbuffer_empty_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[1].valid |-> ##1 icache_areq_i.fetch_req);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[1].valid |-> ##1 dcache_req_ports_i[2].data_gnt);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[1].valid |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[2].valid |-> ##1 dcache_wbuffer_empty_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[2].valid |-> ##1 icache_areq_i.fetch_req);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[2].valid |-> ##1 dcache_req_ports_i[2].data_gnt);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[2].valid |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[3].valid |-> ##1 dcache_wbuffer_empty_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[3].valid |-> ##1 icache_areq_i.fetch_req);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[3].valid |-> ##1 dcache_req_ports_i[2].data_gnt);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[3].valid |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_read_pointer_q[0] |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_read_pointer_q[1] |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_write_pointer_q[0] |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_write_pointer_q[1] |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.lsu_bypass_i.read_pointer_q |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.lsu_bypass_i.write_pointer_q |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_valid_i |-> ##1 dcache_wbuffer_empty_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_valid_i |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_i |-> ##1 dcache_wbuffer_empty_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolve_branch_o |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolve_branch_o |-> ##1 dcache_wbuffer_empty_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolve_branch_o |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolve_branch_o |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_o.is_mispredict |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_o.is_mispredict |-> ##1 dcache_wbuffer_empty_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_o.is_mispredict |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_o.is_mispredict |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_o.is_taken |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_o.is_taken |-> ##1 dcache_wbuffer_empty_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_o.is_taken |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) resolved_branch_o.is_taken |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) store_valid_o |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) store_valid_o |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) store_valid_o |-> ##1 dcache_wbuffer_empty_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) store_valid_o |-> ##1 lsu_commit_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) store_valid_o |-> ##1 debug_mode_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) no_st_pending_o |-> ##1 lsu_commit_ready_o);
In Both
assert property (@(posedge clk_i) disable iff (!rst_ni) alu_valid_i |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) branch_valid_i |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) branch_valid_i |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) branch_valid_i |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_buffer_i.csr_reg_q.valid |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_buffer_i.csr_reg_q.valid |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_commit_i |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_commit_i |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_valid_i |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_valid_i |-> ##1 csr_buffer_i.csr_reg_q.valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) dcache_req_ports_i[1].data_gnt |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) dcache_req_ports_i[1].data_gnt |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) dcache_req_ports_i[1].data_gnt |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) dcache_req_ports_i[1].data_rvalid |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) dcache_req_ports_i[1].data_rvalid |-> ##1 load_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) dcache_req_ports_i[1].data_rvalid |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) dcache_req_ports_i[1].data_rvalid |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) dcache_req_ports_i[2].data_gnt |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) dcache_req_ports_i[2].data_gnt |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) dcache_req_ports_i[2].data_gnt |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) dcache_wbuffer_empty_i |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) debug_mode_i |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) debug_mode_i |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) flush_i |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) fpu_valid_i |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) fpu_valid_i |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) fpu_valid_i |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) fpu_valid_i |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.i_div.state_q[0] |-> ##1 i_mult.i_div.rem_sel_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.i_div.state_q[0] |-> ##1 lsu_i.lsu_bypass_i.write_pointer_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.i_div.state_q[0] |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.i_div.state_q[0] |-> ##1 lsu_i.lsu_bypass_i.read_pointer_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.i_div.state_q[0] |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.i_div.state_q[0] |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.i_div.state_q[0] |-> ##1 i_mult.i_div.div_res_zero_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.i_div.state_q[0] |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.i_multiplier.mult_valid_o |-> ##1 i_mult.i_div.rem_sel_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.i_multiplier.mult_valid_o |-> ##1 i_mult.word_op_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.i_multiplier.mult_valid_o |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.i_multiplier.mult_valid_o |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.i_multiplier.mult_valid_o |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.i_multiplier.mult_valid_o |-> ##1 i_mult.i_div.div_res_zero_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.i_multiplier.mult_valid_o |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.mul_valid |-> ##1 i_mult.i_div.rem_sel_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.mul_valid |-> ##1 i_mult.word_op_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.mul_valid |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.mul_valid |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.mul_valid |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.mul_valid |-> ##1 i_mult.i_div.div_res_zero_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) i_mult.mul_valid |-> ##1 lsu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) icache_areq_i.fetch_req |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) is_compressed_instr_i |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_commit_i |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.state_q[0] |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.state_q[0] |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.state_q[1] |-> ##1 i_mult.i_div.rem_sel_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.state_q[1] |-> ##1 lsu_i.lsu_bypass_i.write_pointer_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.state_q[1] |-> ##1 i_mult.word_op_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.state_q[1] |-> ##1 lsu_i.lsu_bypass_i.status_cnt_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.state_q[1] |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_queue_q[2].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.state_q[1] |-> ##1 lsu_i.lsu_bypass_i.read_pointer_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.state_q[1] |-> ##1 i_mult.i_div.div_res_zero_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.state_q[1] |-> ##1 lsu_i.lsu_bypass_i.mem_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.state_q[1] |-> ##1 lsu_i.lsu_bypass_i.mem_q[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[0].valid |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[0].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.speculative_read_pointer_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[0].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.speculative_write_pointer_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[0].valid |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[1].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.speculative_write_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[1].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.speculative_read_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[1].valid |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[1].valid |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[2].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.speculative_write_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[2].valid |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[2].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.speculative_read_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[2].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.speculative_read_pointer_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[2].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.speculative_write_pointer_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[2].valid |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[3].valid |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[3].valid |-> ##1 lsu_i.lsu_bypass_i.write_pointer_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[3].valid |-> ##1 lsu_i.lsu_bypass_i.read_pointer_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.commit_queue_q[3].valid |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[0].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_queue_q[0].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[0].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.speculative_read_pointer_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[0].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.speculative_write_pointer_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[0].valid |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[1].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.speculative_write_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[1].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.speculative_read_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[1].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_queue_q[1].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[1].valid |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[2].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.speculative_write_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[2].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_queue_q[2].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[2].valid |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[2].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.speculative_read_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[2].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.speculative_read_pointer_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[2].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.speculative_write_pointer_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[3].valid |-> ##1 lsu_i.i_store_unit.store_buffer_i.commit_queue_q[3].valid);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[3].valid |-> ##1 lsu_i.lsu_bypass_i.write_pointer_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[3].valid |-> ##1 lsu_i.lsu_bypass_i.read_pointer_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_queue_q[3].valid |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_write_pointer_q[0] |-> ##1 lsu_i.i_store_unit.store_buffer_i.speculative_read_pointer_q[0]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_i.i_store_unit.store_buffer_i.speculative_write_pointer_q[1] |-> ##1 lsu_i.i_store_unit.store_buffer_i.speculative_read_pointer_q[1]);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_valid_i |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) lsu_valid_i |-> ##1 flu_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_i |-> ##1 i_mult.i_div.rem_sel_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_i |-> ##1 flu_valid_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_i |-> ##1 lsu_commit_ready_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_i |-> ##1 no_st_pending_o);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_i |-> ##1 i_mult.i_div.div_res_zero_q);
assert property (@(posedge clk_i) disable iff (!rst_ni) mult_valid_i |-> ##1 lsu_ready_o);
Commit Stage
In HARM Not in BPS
In BPS Not in HARM
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_ack_o[1] |-> ##1 no_st_pending_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_ack_o[1] |-> ##1 commit_instr_i[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_i[0].ex.valid |-> ##1 no_st_pending_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_i[0].is_compressed |-> ##1 no_st_pending_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_i[0].use_pc |-> ##1 commit_lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_i[0].use_pc |-> ##1 no_st_pending_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_i[1].ex.valid |-> ##1 commit_lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_i[1].ex.valid |-> ##1 no_st_pending_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_i[1].is_compressed |-> ##1 no_st_pending_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_i[1].use_pc |-> ##1 commit_lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_i[1].use_pc |-> ##1 no_st_pending_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_i[1].valid |-> ##1 no_st_pending_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_write_fflags_o |-> ##1 commit_lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) csr_write_fflags_o |-> ##1 no_st_pending_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) dirty_fp_state_o |-> ##1 commit_lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) dirty_fp_state_o |-> ##1 no_st_pending_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) exception_o.valid |-> ##1 commit_lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) exception_o.valid |-> ##1 no_st_pending_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) exception_o.valid |-> ##1 commit_instr_i[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) exception_o.valid |-> ##1 commit_instr_i[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) fence_i_o |-> ##1 commit_lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) fence_i_o |-> ##1 no_st_pending_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) fence_i_o |-> ##1 commit_instr_i[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) fence_i_o |-> ##1 commit_instr_i[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) fence_o |-> ##1 commit_lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) fence_o |-> ##1 no_st_pending_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) fence_o |-> ##1 commit_instr_i[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) fence_o |-> ##1 commit_instr_i[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) we_fpr_o[0] |-> ##1 commit_lsu_ready_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) we_fpr_o[0] |-> ##1 no_st_pending_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) we_gpr_o[1] |-> ##1 no_st_pending_i);
assert property (@(posedge clk_i) disable iff (!rst_ni) we_gpr_o[1] |-> ##1 commit_instr_i[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) no_st_pending_i |-> ##1 commit_lsu_ready_i);
In Both
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_i[0].ex.valid |-> ##1 commit_instr_i[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_i[0].ex.valid |-> ##1 commit_instr_i[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_i[1].ex.valid |-> ##1 commit_instr_i[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_i[1].use_pc |-> ##1 commit_instr_i[0].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_i[1].use_pc |-> ##1 commit_instr_i[1].use_imm);
assert property (@(posedge clk_i) disable iff (!rst_ni) commit_instr_i[1].valid |-> ##1 commit_instr_i[1].use_imm);